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AMIS-722402: Contact Image Sensor
Data Sheet
1.0 General Description
AMI Semiconductor's AMIS-722402 (PI5002D) contact image sensor (CIS) consists of 1376 active pixels which enables the selection of 2400, 1200, 600, or 300 dots per inch (dpi) resolutions, and employs AMI Semiconductor's proprietary CMOS image sensing technology. The sensor contains an on-chip output amplifier, power down circuitry and parallel transfer features that are uniquely combined with the present-day active-pixel-sensor technology. The image sensors are designed to be cascaded end-to-end on a printed circuit board (PCB) and packaged in an image sensing module. Applications for the sensor array includes facsimiles, PC scanners, check readers, and office automation equipment. Figure 1 is a block diagram of the sensor, showing 1376 active pixels, their associated multiplexing switches, buffers, and an output amplifier circuit with a power down feature. The sensors pixel-pixel spacing is approximately 10.58m. The size of each sensor without the scribe lines is 14560m by 230m.
2.0 Key Features
* * * * * * * * * * * * 2400, 1200, 600, and 300dpi selectable resolutions 1376 image sensor elements (pixels) 10.58m (2400dpi) pixel center-to-center spacing On-chip amplifier Single 3.3V power supply 3.3V input clocks and control signals 3MHz maximum pixel rate Parallel / integrate and transfer Power-down circuit High sensitivity Low power Low noise
14560m 7.26m 10.58m
1
2
3
4
Row of 1376 Pixels (2400dpi)
1374
1375
1376
Parallel Transfer, Storage Cells and Readout Registers Scan Direction Amplifier, PowerDown and Offset Control
SI GBST CLK SIC WS VOUT VREF VSS VDD VBIAS
230m
Biasing
SR1
SR2
SO
Figure 1: Sensor Block Diagram
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AMIS-722402: Contact Image Sensor
3.0 Unique Features
There are six unique features incorporated into the AMIS-722402 which improve the sensor's performance. 3.1 Pixel-to-pixel Offset Cancellation Circuit
Data Sheet
The sensor employs a pixel-to-pixel offset cancellation circuit, which reduces the fixed pattern noise (FPN), and amplifier offsets. In addition, this innovative circuit design greatly improves the optical linearity and low noise sensitivity. 3.2 Parallel Integrate, Transfer and Hold The sensor has a parallel integrate, transfer and hold feature, which allows the sensor to be read out while photon integration is taking place. These features are approached through the use of an integrate-and-hold cell, located at each pixel site. Each pixel's charge is read from its storage site as the sensor's shift register sequentially transfers each pixel's charge onto a common video line. 3.3 Dual Scan Initiation Inputs, GBST and SI Each sensor has two scan initiation inputs, the global start pulse (GBST) and the start pulse (SI), which are compatible with standard 3.3V CMOS clocks. These clocks help to reduce the sensor-to-sensor transition FPN by initializing and preprocessing all sensors simultaneously before they start their readout scan. The internal shift register starts the scan after GBST is clocked in on the falling edge of the clock input (CLK). During the first 75 clock cycles following a GBST pulse, all the pixels of all the cascaded sensors cycle through their pre-scan initialization process that reduces FPN and reset noise. A sequence of cascaded sensors has a unique first sensor and identically behaving subsequent sensors. The start input control (SIC) defines whether a sensor will be the first sensor that self-starts the readout of its pixels or will be a subsequent sensor that waits for the SI before starting the readout of its pixels. With its SIC tied high (Vdd), the first sensor self-starts the readout of its pixels after 75 clock cycles of delay. With their SIC tied low (ground), all of the subsequent sensors delay their readout of their pixels until after they receive a SI pulse. Furthermore, the first sensor's SI is left unconnected, while the subsequent sensors all have their SI connected to the endof-scan (SO) of their respective preceding sensor. Just prior to finishing its readout of its pixels, each sensor will send a SO pulse to its respective subsequent sensor so that its respective subsequent sensor will continue the readout of pixels without a pause or gap in readout. The external module-level start pulse (SP) is connected to all of the sensors' GBST inputs.
nd For example in the 2400dpi mode, when the first sensor completes its scan, its SO appears on the rising edge of 1442 clock cycle after the entry of GBST and nine pixels before its last pixel, in order to have a continuous pixel readout between sensors in a module. This SO enters as the SI clock of the second and subsequent sensors; hence all subsequent sensors will start their register scan after each of the preceding sensors completes its scan.
3.4 Power Saving Each sensor incorporates a power-saving feature when multiple sensors are cascaded together to form a linear imaging array. When a particular sensor is selected to be read out, the SIC on each sensor selects a unique feature of powering up that sensor's output amplifier and powering it down when not selected. 3.5 Common Reference Voltage between Cascaded Sensors Each sensor has an input/output bias control (VREF), which serves as an offset voltage reference. Each bias control pad is connected to an internal bias source and tied to its own amplifier's reference bias input. In operation, these pads on every sensor are connected together. Each sensor then "shares" the same bias level to maintain a constant bias among all of the sensors. 3.6 Selectable Resolutions of 2400dpi, 1200dpi, 600dpi, 300dpi The sensor allows for four selectable resolutions; 2400dpi, 1200dpi, 600dpi, and 300dpi, which are controlled by the select resolution 1 and 2 inputs, (SR1, SR2). The following truth details the conditions of the SR1 and SR2 inputs in order to select each resolution, where low represents the input is connected to ground and a high represents the input connected to Vdd.
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AMIS-722402: Contact Image Sensor
Data Sheet
In the 2400dpi mode, all 1376 pixels are clocked out, whereas in the 1200dpi mode, Pixels 1 and 2 are combined, 3 and 4 are combined and so on up to Pixels 1375 and 1376 being combined. One half of the pixel amplifiers and one half of the scanning registers are then disabled. As a result, sensitivity in the 1200dpi mode will be twice that of the 2400dpi mode and the 1200dpi readout time will be approximately half of the 2400dpi readout time. Similarly, in the 600dpi mode, Pixels 1-4 are combined, Pixels 5-8 are combined and so on up to Pixels 1373-1376 being combined. Only one quarter of the pixel amplifiers and shift registers are then used. The 600dpi sensitivity will be four times that of the 2400dpi, and the readout time will be one quarter of the 2400dpi readout time. In the 300dpi mode, Pixels 1-8 are combined, Pixels 9-16 are combined and so on up to Pixels 1369-1376 being combined. Only one eighth of the pixel amplifiers and shift registers are then used. The 300dpi sensitivity will be eight times that of the 2400dpi, and the readout time will be one eighth of the 2400dpi readout time. Unlike a CCD array, all of the 2400dpi, 1200dpi, 600dpi, and 300dpi arrays can operate with the same clock frequency.
Table 1: Select Resolution Conditions Resolution Select Resolution 1 (SR1) 2400dpi L 1200dpi L 600dpi H 300dpi H Select Resolution 2 (SR2) L H L H
4.0 Functional Description
4.1 Input / Output Terminals The AMIS-722402 image sensor has 13 pads that become inter-connected when they are cascaded end-to-end on a PCB and packaged in an image sensing module. Their symbols and functions are listed in Table 2.
Table 2: Input and Output Terminals Signal I/O Description SI I Start pulse: Input to start a line scan (see discussion of the sensors unique features for further details) Global start pulse: GBST I Globally initializes the start inputs of all sensors and starts the scanning process of the first sensor (see discussion of the sensors unique features for further details) CLK I Clock: Clock input for the shift register Start input control: SIC I Input to control the Start Pulse to the first sensor (see discussion of the sensors unique features for further details) Waveform select: WS I Selects between two different readout modes, the waveform select input is left unconnected or held high for normal sampling and held low for CDS sampling VOUT O Video output voltage: Output video signal from the chip VREF I/O Reference voltage: Reference input voltage for the amplifier output; sets the output's reset (dark) level VSS I Ground VDD I Power supply Internal bias voltage. VBIAS O This is an internal bias voltage which should be connected via an external decoupling capacitor to Vdd on the modules' PCB for noise reduction. Special care may be required to minimize electro-magnetic interference coupling to this line. Select resolution 1: SR1 I Selects the 2400, 1200, 600, or 300dpi modes in conjunction with SR2 (see discussion of the sensors unique features for further details) Select resolution 2: SR2 I Selects the 2400, 1200, 600, or 300dpi modes in conjunction with SR1 (see discussion of the sensors unique features for further details) SO O End of scan pulse: Output from the shift register at the end of a scan
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AMIS-722402: Contact Image Sensor
Data Sheet
4.2 Bonding Pad Layout Diagram Figure 2 shows the bonding pad locations for the AMIS-722402 sensor.
14560m
230m
SI GBST CLK SIC WS VOUT VREF VSS VDD VBIAS SR1 SR2 SO
Pad Location Table Pad SI GBST CLK SIC WS VOUT VREF VSS VDD VBIAS SR1 SR2 SO Location Start Pulse Global Start Pulse Clock Start Input Control Waveform Select Video Output Voltage Reference Voltage Ground Power Supply Chip Bias Voltage Select Resolution 1 Select Resolution 2 End of Scan Pulse 20 20 20 20 20 20 20 20 20 20 20 20 20 Y X 2127 2379 2633 2890 3826 4077 6084 6428 7393 10960 11214 11468 12103 Notes: 1. The drawing is not to scale. 2. The die length and width are given in the above sensor die figure 3. Pad locations are listed in the Pad Location Table eg.
Y X X
SI
GBST
4. Each pad is 100 x 70um 5. All dimensions are in um 6. Die size does not include the scribe line
Figure 2: AMIS-722402 Bonding Pad Layout
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AMIS-722402: Contact Image Sensor
4.3 Wafer Scribe Line Figure 3 outlines the scribe line dimensions surrounding the sensor die on a wafer.
Data Sheet
55m
230m
55m
14560m
55m
55m
Figure 3: Wafer Scribe Line
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AMIS-722402: Contact Image Sensor
5.0 Electro-Optical Specifications
Table 3 lists the electro-optical specifications of the AMIS-722402 sensor at 25C and Vdd = 3.3V.
Table 3: Electro-Optical Specifications Parameter (1) Number of pixels @ 2400dpi @ 1200dpi @ 600dpi @ 300dpi (1) Pixel-to-pixel spacing @ 2400dpi @ 1200dpi @ 600dpi @ 300dpi (2) Dark output voltage level (3) Dark output non-uniformity (4) Photo-response non-uniformity (5) Adjacent photo-response non-uniformity (6) Sensor-to-sensor photo-response non-uniformity (7) Saturation voltage (8) Sensitivity @ 300dpi @ 600dpi @ 1200dpi @ 2400dpi Photo response linearity, between lower and upper end of the (9) linear range (approx range of. 0.1-0.75V) (10) Individual pixel noise (rms) @ 2400dpi @ 1200dpi @ 600dpi @ 300dpi (11) Average pixel noise (rms) @ 2400dpi @ 1200dpi @ 600dpi @ 300dpi (12) Row noise, without external sources (rms) @ 2400dpi @ 1200dpi @ 600dpi @ 300dpi Wafer thickness Symbol Min. 1376 688 344 172 10.58 21.16 42.32 84.64 Vd Ud Up Upn Usensor VSat 0.35 80 15 15 10 0.9 1.2 2440 1220 610 305 2 2.5 3.5 4.5 5.5 2.5 3.5 4.5 5.5 0.50 0.50 0.75 1.00 300 3 4 5 6 Typ. Max. 1376 688 344 172 10.58 21.16 42.32 84.64
Data Sheet
Units
m m m m V mV % % % Volts V/J/cm 2 V/J/cm 2 V/J/cm 2 V/J/cm % mV mV mV mV mV mV mV mV mV mV mV mV m
2
Sv
PRL
P_noise
Pavg_noise
Row_noise 280
320
Notes for Table 3 are listed on the next page under "Definitions of Electro-Optical Specifications".
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AMIS-722402: Contact Image Sensor
5.1 Definitions of Electro-optical Specifications
Data Sheet
All electrical specifications will be measured at a pixel rate of 3.0MHz, a temperature of 25 C, Vdd = 3.3V, Vref = 0.35V and at an integration time of 0.9ms for 300dpi, 1.8ms for 600dpi, 3.76ms for 1200dpi, and 7.2ms for 2400dpi. The average output voltage Vpavg, which is defined as the voltage difference between the average pixel level in the light and the average pixel level in the dark, will be adjusted to approximately 1.0V, unless stated otherwise. A linear array of uniform green LED's will be used as the light source for measurements requiring illumination, unless stated otherwise. As a guideline, the recommended load on the output should be 1K1.
2. 3. 4. 5. 6. 7.
8. 9. 10. 11. 12.
Selectable resolutions. The sensor allows for four selectable resolutions; 2400dpi, 1200dpi, 600dpi, and 300dpi, which are controlled by the SR1 and SR2 inputs. Table 1 details how each resolution mode is selected. In the 2400dpi mode, all 1376 pixels are clocked out, whereas in the 1200dpi mode, Pixels 1 and 2 are combined, 3 and 4 are combined and so on up to Pixels 1375 and 1376 being combined. One half of the pixel amplifiers and one half of the scanning register are then disabled. As a result, sensitivity in the 1200dpi mode will be twice that of the 2400dpi mode and the 1200dpi readout time will be approximately half of the 2400dpi readout time. Similarly, in the 600dpi mode, Pixels 1-4 are combined, Pixels 5-8 are combined and so on up to Pixels 1373-1376 being combined. Only one quarter of the pixel amplifiers and shift registers are then used. The 600dpi sensitivity will be four times that of the 2400dpi, and the readout time will be one quarter of the 2400dpi readout time. In the 300dpi mode, Pixels 1-8 are combined, Pixels 9-16 are combined and so on up to Pixels 1369-1376 being combined. Only one eighth of the pixel amplifiers and shift registers are then used. The 300dpi sensitivity will be eight times that of the 2400dpi, and the readout time will be one eighth of the 2400dpi readout time. Dark output voltage (Vd). Vd is the average dark output level and is essentially the offset level of the video output in the dark. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 0.35V for optimal module operation. Dark output non-uniformity (Ud). Ud = Vdmax-Vdmin, where Vdmax is the maximum pixel output voltage in the dark and Vdmin is the minimum pixel output voltage in the dark. Photo-response non-uniformity (Up). Up = ((Vpmax-Vpavg)/Vpavg) x 100% or ((Vpavg-Vpmin)/Vpavg) x 100%, whichever is the greater, where Vpmax is the maximum pixel output voltage in the light, Vpmin is the minimum pixel output voltage in the light and Vpavg is average output voltage of all pixels in the light. Adjacent photo-response non-uniformity (Upn). Upn = Max ((Vpn, Vpn+1) / Min (Vpn, Vpn+1)) x 100%, where Vpn is the pixel output voltage of pixel n in the light. Sensor-to-sensor photo-response non-uniformity (Usensor). Usensor = (Vpavg - Wavg) / Wavg), where Wavg is the average output of all sensors on the same wafer that pass all other specifications. Saturation voltage (VSat) is defined as the maximum video output voltage swing measured from the dark level to the saturation level. It is measured by using the module LED light source with the module imaging a uniform white target. The LED light level is increased until the output voltage no longer increases with an increase in the LED brightness. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 0.35V for optimal module operation. Sensitivity (Sv) is defined as the slope of the Vpavg vs. Exposure curve. Photo-response linearity (PRL). Photo-response linearity is defined as the max. deviation of response compared to a best fit line as a percentage of full scale, where full scale is the maximum value of the linearity range of operation; approx 0.75V. Photo-response linearity is specified within the linearity range of operation, approx 0.1-0.75V. Individual pixel noise in rms (P_noise). The individual pixel noise in rms is defined as the standard deviation of each pixel in the dark. The maximum of all pixel standard deviations is the maximum individual pixel noise in rms. This can also be thought of as output referred noise as it is measured at the sensor output. Average pixel noise in rms (Pavg_noise). The average pixel noise in rms is defined as the average of all pixel standard deviations in the dark. A 2.5mV rms value has a peak-peak equivalent of 15mV. This can also be thought of as output referred noise as it is measured at the sensor output. Row noise in rms (Row_noise) Each chip is binned into four equal bins and the row noise in rms is defined as the standard deviation of each bin. The row noise specification does not include any noise due to external sources.
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AMIS-722402: Contact Image Sensor
6.0 Recommended Operating Conditions
Table 4 lists the recommended operating conditions @ 25C.
Table 4: Recommended Operating Conditions @ 25 C Parameter Power supply (1) Clock input voltage high level (1) Clock input voltage low level Power supply current Reference voltage
(3) (2)
Data Sheet
Symbol Vdd
Min. 3.0 2.4 0
IDD (sensor during readout) IDD (sensor between readouts) IDD (15 chip module) VREF 0 0.5 0.5 Tint 477 459
Typ. 3.3 3.3 0 8 3.0 50 0.35 2.5 2.5
Max. 3.6 3.6 0.8 12 4.5 75 0.8 3.0 3.0
Units V V V mA mA mA V MHz MHz s s / die %
Clock frequency (4) Pixel rate Integration time @ 2400dpi (5) (line scan rate) First die Subsequent die (6) Clock pulse duty cycle
Notes: 1. 2. 3. 4. 5.
50
Applies to all clocks; GBST, SI and CLK. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 0.35V for optimal module operation. Although the device will operate with a pixel rate of less than 500kHz, it is recommended that the device be operated above 500kHz to maintain performance characteristics. Operating below 500kHz may result in leakage current degradation. One pixel is clocked out for every clock cycle. Tint is the integration time of a single sensor and is the time between two SIs. The minimum integration time is the time it takes to clock out 75 inactive pixels and 1376 active pixels for the 2400dpi mode, 75 inactive pixels and 688 active pixels for the 1200dpi mode, 75 inactive pixels and 344 active pixels for 600dpi mode, 75 inactive pixels and 172 active pixels for 300dpi mode, at a given frequency. However, if several sensors are cascaded together in a module then the minimum integration time for the 2400dpi mode is the time it takes to clock out 75 inactive pixels and 1376 active pixels from the first sensor and 1376 pixels from each of all subsequent sensors, at a given frequency. For cascaded sensors in the 1200dpi mode, the minimum integration time is the time it takes to clock out 75 inactive pixels and 688 active pixels from the sensor and 688 pixels from each of all subsequent sensors, at a given frequency. Similarly, for cascaded sensors in the 300dpi mode, the minimum integration time is the time it takes to clock out 75 inactive pixels and 172 active pixels from the first sensor and 172 pixels from each of all subsequent sensors, at a given frequency. The clock duty cycle is defined as the ration of the positive duration of the clock to its period.
6.
7.0 Absolute Maximum Ratings
Table 5 lists the absolute maximum ratings.
Table 5: Absolute Maximum Ratings Parameter Power supply voltage (Vdd) Clock input voltage high level Clock input voltage low level Operating temperature Operating humidity Storage temperature Storage humidity
Note: 1. Applies to all clocks; GBST, SI and CLK.
(1) (1)
Max. 5 Vdd + 0.2 -0.5 -10 to +50 +10 to +85 -25 to +75 +10 to +90
Units V V V C RH% C RH%
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AMIS-722402: Contact Image Sensor
8.0 Timing Requirements
Data Sheet
Table 6 lists the timing requirements for all four resolution modes, and their associated timing diagrams are shown in Figures 4-9.
Table 6: Timing Requirements Parameter Clock (CLK) period Clock (CLK) pulse width Clock (CLK) duty cycle (1) Data setup time (1) Data hold time (2) Clock (CLK) rise time (2) Clock (CLK) fall time (2) End-of-scan (SO) rise time (2) End-of-scan (SO) fall time (3) Global start (GBST) rise time (3) Global start (GBST) fall time (4,5) Pixel rise time (4,5) Pixel fall time
Notes: 1. 2. 3. 4. 5.
Symbol CLKp CLKpw Tset Thold CLKrt CLKft SOrt SOft GBSTrt GBSTft Prt Pft
Min. 330
Typ. 400 200 50
Max. 2000
20 25 70 70 50 50 70 70 100 30
Units ns ns % ns ns ns ns ns ns ns ns ns ns
The shift register will load on all falling CLK edges, so setup and hold times (Tset, Thold) are needed to prevent the loading of multiple start pulses. This would occur if the GBST remains high during two fallings edges of the CLK signal. See Figure 8. SI starts the register scanning and the first active pixel is read out on the 76th clock of the CLK signal. However, when multiple sensors are sequentially scanned, as in CIS modules, the SO from the predecessor sensor becomes the SI to the subsequent sensor, hence the SI clock = the SO clock. As discussed under the third unique feature, the GBST starts the initialization process and preprocesses all sensors simultaneously in the first 75 clock cycles before the first pixel is scanned onto the video line from the first sensor. The transition between pixels does not always reach the dark offset level as shown in the timing diagrams, see Vout. The timing diagrams show the transition doing so for illustration purposes; however a stable pixel sampling point does exist for every pixel. The pixel rise time is defined as the time from when the CLK's rising edge has reached 50 percent of its maximum amplitude to the point when a pixel has reached 90 percent of its maximum amplitude. The pixel fall time is defined as the time from when the CLK's falling edge has reached 50 percent of its maximum amplitude to the point when a pixel has reached 10 percent of its maximum amplitude.
Figures 4, 5, 6, and 7 show the initialization of the first sensor in relation to its subsequent cascaded sensors for all four resolution modes. The SIC selects the first sensor to operate with 75 clock cycles of delay by connecting it to Vdd on the first sensor and to Ground for all of the subsequent sensors. Hence the first sensor will operate with 75 inactive pixels being clocked out before its first active pixel is clocked out.
GBST
CLK
1 2 3 72 73 74 75 76 77 78 79 1442 1443
1444
1447
1448
1449
1450
1451
SO
VOUT
75 Inactive Pixels (75 Clocks)
1
2
3
4
1367
1368
1369
1372
1373
1374
1375
1376
1376 Active Pixels (1376 Clocks)
Figure 4: Overall Timing Diagram for the 2400dpi Mode
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AMIS-722402: Contact Image Sensor
Data Sheet
GBST
CLK
1 2 3 72 73 74 75 76
77
78
79
754
755
756
759
760
761
762
763
SO
VOUT
75 Inactive Pixels (75 Clocks)
1
2
3
4
679
680
681
684
685
686
687
688
688 Active Pixels (688 Clocks)
Figure 5: Overall Timing Diagram for the 1200dpi Mode
GBST
CLK
1 2 3 72 73 74 75 76 77 78 79 410 411 412 415 416 417 418 419
SO
VOUT
75 Inactive Pixels (75 Clocks)
1
2
3
4
335
336
337
340
341
342
343
344
344 Active Pixels (344 Clocks)
Figure 6: Overall Timing Diagram for the 600dpi Mode
GBST
CLK
1 2 3 72 73 74 75 76 77 78 79 238 239 240 243 244 245 246 247
SO
VOUT
75 Inactive Pixels (75 Clocks)
1
2
3
4
163
164
165
168
169
170
171
172
172 Active Pixels (172 Clocks)
Figure 7: Overall Timing Diagram for the 300dpi Mode
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AMIS-722402: Contact Image Sensor
Data Sheet
Figures 8 and 9 detail the timing of the CLK, GBST, Vout, and SI/SO signals in further detail, which have the same timing requirements for the 2400, 1200, 600, and 300dpi modes. The rise and fall times are listed in Table 6. In Figure 8, note that Pixel 76 is the first active pixel, as the first 75 pixels are dummy pixels.
CLKpw
CLKpw
CLKp
CLK
Thold Tset
50%
50% CLKft
50%
50%
CLKrt
GBST
GBSTrt GBSTft Prt 90%
VOUT
Pft
10%
SI/SO
SI/SOrt SI/SOft
Figure 8: Rise and Fall Times for both the 2400, 1200, 600, 300dpi Modes
CLK Thold GBST Tset
Thold
1
2
Tset
75
76
77
78
Video Signal (Vout)
1
2
55
56
57
58
Figure 9: Timing of GBST-to-first Pixel of the First Sensor for 2400, 1200, 600, 300dpi Modes
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AMIS-722402: Contact Image Sensor
Data Sheet
Figures 10 to 13 show the timing of the SI/SO. At 2400dpi the SI/SO comes out in line with the 1367th pixel, at 1200dpi it comes out in th th rd line with the 679 pixel, at 600dpi it comes out in line with the 335 pixel, and at 300dpi it comes out in line with the 163 pixel. The SO from the first sensor enters as the SI clock of the second and subsequent sensors; hence all subsequent sensors will start their register scan after each of the preceding sensors completes its scan. The last active pixel of each sensor is the 1376th pixel for the 2400dpi mode, the 688th pixel for the 1200dpi mode, 344th pixel for the nd 600dpi mode, and 172 pixel for the 300dpi mode.
1st CLK of second sensor
CLK
1441
1442
1443
1444
1445
1450
1451
1
2
CLK numbers include timing for 75 inactive pixels and 1376 active pixels
SI / SO
Vout 1367 1368 1369 1370 1375 1376 1 2
Pixel 1 of second sensor
Last active pixel = pixel 1376
Figure 10: Timing of SI/SO Clock for the 2400dpi Mode
1st CLK of second sensor
CLK
753
754
755
756
757
762
763
1
2
CLK numbers include timing for 75 inactive pixels and 688 active pixels
SI / SO
Vout 679
680
681
682
687
688
1
2
Pixel 1 of second sensor
Last active pixel = pixel 688
Figure 11: Timing of SI/SO Clock for the 1200dpi Mode
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AMIS-722402: Contact Image Sensor
Data Sheet
1st CLK of second sensor
CLK
409
410
411
412
413
418
419
1
2
CLK numbers include timing for 75 inactive pixels and 344 active pixels
SI / SO
Vout 335 336 337 338 343 344 1 2
Pixel 1 of second sensor
Last active pixel = pixel 344
Figure 12: Timing of SI/SO Clock for the 600dpi Mode
1st CLK of second sensor
CLK
237
238
239
240
241
246
247
1
2
CLK numbers include timing for 75 inactive pixels and 172 active pixels
SI / SO
Vout
163
164
165
166
171
172
1
2
Pixel 1 of second sensor
Last active pixel = pixel 172
Figure 13: Timing of SI/SO Clock for the 300dpi Mode
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AMIS-722402: Contact Image Sensor
Data Sheet
9.0 Example of a CIS Module Using Cascaded AMIS-722402 Image Sensors
Figure 14 shows the proposed PCB schematic of the 15 chip CIS module.
Figure 14: CIS Module with AMIS-722402 Image Sensors
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AMIS-722402: Contact Image Sensor
10.0 Company or Product Inquiries
Data Sheet
For more information about AMI Semiconductor, our technology and our product, visit our Web site at: http://www.amis.com North America Tel: +1.208.233.4690 Fax: +1.208.234.6795 Europe Tel: +32 (0) 55.33.22.11 Fax: +32 (0) 55.31.81.12
Production Technical Data - The information contained in this document applies to a product in production. AMI Semiconductor and its subsidiaries ("AMIS") have made every effort to ensure that the information is accurate and reliable. However, the characteristics and specifications of the product are subject to change without notice and the information is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify that data being relied on is the most current and complete. AMIS reserves the right to discontinue production and change specifications and prices at any time and without notice. Products sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no other warranty, express or implied, and disclaims the warranties of noninfringement, merchantability, or fitness for a particular purpose. AMI Semiconductor's products are intended for use in ordinary commercial applications. These products are not designed, authorized, or warranted to be suitable for use in life-support systems or other critical applications where malfunction may cause personal injury. Inclusion of AMIS products in such applications is understood to be fully at the customer's risk. Applications requiring extended temperature range, operation in unusual environmental conditions, or high reliability, such as military or medical life-support, are specifically not recommended without additional processing by AMIS for such applications. Copyright (c) 2006 AMI Semiconductor, Inc.
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Price & Availability of AMIS-722402

	To Download AMIS-722402 Datasheet File
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